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A 46pJ/pulse analog front-end in 130nm CMOS for UWB impulse radio receivers

Book Contribution - Book Chapter Conference Contribution

This paper presents an integrated ultra-low power analog frontend architecture for UWB impulse radio receivers. The receiver is targeted towards applications like wireless sensor networks and body-area networks typically requiring ultra energy-efficient, low data-rate communication over a relative short range. The proposed receiver implements pulse correlation in the analog domain to severely relax the power consumption of the ADC's and digital backend. Furthermore a fully integrated prototype of the analog front-end, containing an analog pulse correlator, a linear-in-dB variable gain amplifier and a 4-bit ADC, is demonstrated. Several design decisions and techniques, like correlation with a windowed LO instead of with a matched template, exploiting the duty-cycled nature of the system, operation in the sub-lGHz band as well as careful circuit design are employed to reach ultra-low power consumption. The analog front-end was manufactured in 130nm CMOS and the active circuit area measures only 600mu;m x 730/μm. A maximum channel conversion gain of 50dB can be achieved. The AFE consumes 1.44mA at 1.2V power supply and operates at a pulse rate of 37.5Mpulses per second. This corresponds to an energy consumption of 46pJ/pulse which is by far best-in-class. A wireless link over more than 3.5m in an office-like environment has been demonstrated which makes the proposed receiver well suited for the targeted applications. © 2008 IEEE.
Book: Solid-State Circuits Conference, 2008. ESSCIRC 2008. 34th European
Pages: 378 - 381
ISBN:978-1-4244-2361-3
Publication year:2008
BOF-keylabel:yes
IOF-keylabel:yes
Authors from:Higher Education