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A Power-Efficient Reconfigurable Two-Step VCO-Based ADC for Software-Defined Radio

Book Contribution - Book Chapter Conference Contribution

© 2017 IEEE. This paper presents the full design flow of a flexible two-step VCO-based Delta-Sigma ADC architecture for software-defined radio applications. The proposed ADC reconfigures its signal bandwidth and A/D conversion accuracy in a cost- and power-efficient method. With the ADC open-loop structure and the mostly-digital building blocks, excellent figure-of-merits can be obtained for all modes. A reconfigurable ADC prototype designed in 90nm CMOS technology shows that it achieves 66/80.9dB SNDR respectively within a 20/2MHz signal bandwidth, consuming 5.1/2.9mW of power. The corresponding 78/79.8fJ/step figure-of-merits are among state-of-the-art reconfigurable ADCs, and could be improved even further if technology is scaled.
Book: 2017 IEEE 12TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)
Pages: 620 - 623
Number of pages: 4
ISBN:9781509066247
Publication year:2017
BOF-keylabel:yes
IOF-keylabel:yes
Authors from:Higher Education