< Back to previous page

Project

Hardware-algorithm co-optimization of embedded machine learning systems

TinyML systems enable always-on intelligent sensing at near zero-power budgets. Yet, designing these systems requires cutting inefficiencies at every layer of the stack: from very compact ML models, over efficiently scheduled code, to low footprint hardware architectures exploiting the newest technology features. To efficiently enable such optimization across the complete design stack, one must be able to quickly estimate the impact of a design decision at the other layers of the stack. This Ph.D. will develop such a cross-layer optimization framework, and deploy it towards the design of more efficient machine learning processors.

Date:7 May 2021 →  Today
Keywords:Digital integrated circuits, Deep learning
Disciplines:Digital integrated circuits
Project type:PhD project