GARLIC: a Generic ARchitecture of a Low-loss Integrated Converter, eliminating Vampire Power

Electronic devices and appliances are wasting a lot of energy while they are in standby mode. This so-called vampire energy can be higher than the energy that the device consumes in its operational mode due to the long standby time and the short active mode for typical applications. The reason for this unwanted high power consumption lies in the electronic circuit that converts the high AC mains voltage into a low DC voltage that can supply power to the electronic device. While optimized to work in the active mode, the efficiency of this voltage converter drops below 10 % or even below 1 % in the standby mode. The same holds when the input voltage is a high DC voltage, such as in the case of an electric car battery that directly supplies power the various car electronic systems.Manufacturers of voltage converters are struggling to reduce the energy losses in standby mode. Regulations imposed by the European Commission and the US Department of Energy are becoming more and more stringent, with the goal to reduce energy waste, CO2 emission and electricity cost. Complying with these standby power regulations is seen as a major challenge for the power converter industry. The obvious solution of adding a parallel converter that kicks in only in the standby mode, for which it would be optimized, has proven impossible without an inacceptable inflation of volume and cost.This is where MICAS steps in. We propose a solution that is based on a CMOS chip, which is intrinsically small, cheap and low power. Based on previous research performed in MICAS, we will develop a Generic ARchitecture for a Low-loss Integrated Converter, or GARLIC, eliminating the vampire energy in electronic devices and appliances by taking care of the power supply in the standby mode. At the end of the project, we will demonstrate a highly efficient prototype system that meets the current and future challenges of the AC/DC and DC/DC converter markets.The scientific challenges that need to be tackled during the project are mainly the compatibility of the CMOS chip with the high input voltage and the capacity to deliver enough output power for a large variety of applications. We have already proven the basic concepts that help answer these challenges, but in GARLIC, we will evolve towards the full system level and towards the validation in a demo setting.The valorization approach will follow the proven MICAS strategy. The research results, backed by the hardware demonstration, will be transferred to the industry through licensing, via close collaborations with both large component providers as well as smaller, but highly innovative chip companies. For the first group, targeted companies are e.g. ON Semiconductor and Infineon, who can weigh on the supply chains in the electronics industry in order to realise innovations like the one we propose. The second group contains companies such as Ansem, ICsense and MinDCet. All these companies have already shown interest in the commercialisation of GARLIC.

Keywords:integrated circuit, IC, chip, CMOS integration, voltage converters, high-voltage, low-power

Disciplines:Analogue, RF and mixed signal integrated circuits, Electrical Power Engineering not elsewhere classified