A method for patterning a target layer

According to an aspect of the present inventive concept there is provided a method for patterning a target layer, the method comprising: forming on the target layer a plurality of parallel material lines spaced apart such that longitudinal gaps exposing the target layer are formed between the material lines, filling the gaps with a sacrificial material, forming a hole by removing the sacrificial material along a portion of one of said gaps, the hole extending across said gap and exposing a surface portion of the target layer and sidewall surface portions of material lines on opposite sides of said one gap, performing a selective deposition process adapted to grow a fill material selectively on said one or more surface portions inside the hole, thereby forming a block mask extending across said gap, removing, selectively to the material lines and said block mask, the sacrificial material from the target layer to expose the gaps, said one gap being interrupted in the longitudinal direction by said block mask, and transferring a pattern including the material lines and said block mask into the target layer.

Patent Publication Number: EP3401948

Year filing: 2019

Year approval: 2019

Year publication: 2019

Status: Assigned

Technology domains: Semiconductors

Validated for IOF-key: Yes

Attributed to: Associatie KULeuven