Voltage clamping circuit and use thereof

A voltage clamp circuit (7) is described for reflecting a voltage at an input node (N1). The voltage clamp circuit (7) comprises a circuit (9) for providing at least two currents (lmir, lref) at its output terminals (OUT1, OUT2). It further comprises at least two diodes (10, 11) each being connected to an output terminal (OUT1, OUT2) of the circuit (9) for providing at least two currents and further being connected to a line of a ground voltage (GND) and to the input node (N1) respectively. It also comprises an alternative current path connected to an output terminal (OUT2) of the circuit for providing at least two currents and to a current sinking node. The voltage clamp circuit thus is configured so that the voltage at the input node (N1) is reflected as the voltage between two output nodes (OUT1, OUT2) when the voltage at the input node is lower than a clamping voltage and so that the voltage is fixed between the two output nodes to the clamping voltage when the voltage at the input node (N1) is higher than the clamping voltage. A corresponding method and corresponding systems using such a voltage clamp circuit are also described.

Patent Publication Number: EP2564220

Year filing: 2011

Year approval: 2016

Year publication: 2016

Status: Assigned

Technology domains: Electrical machinery, apparatus, energy, Measurement

Validated for IOF-key: Yes

Attributed to: Associatie KULeuven