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Project
Analysis, modeling and design of multi-rate discrete-time sigma-delta circuits (FWOAL483)
CMOS-technology has continuously scaled to smaller feature sizes over the past decades. Each scaling step improves the performance and reduces the cost of electronic circuits. Today's technology with its deep-submicron feature size imposes new challenges for analog circuits such as for the front-end design of radio transceivers.
One of the main problems is the lack of voltage headroom. Due to this, conventional analog techniques are unable to fully exploit the cost and the performance benefits of technology scaling. On the other hand multi-GHz switching speeds are easily achieved in deep-submicron CMOS technology. This makes it possible to use discrete-time circuits with massive oversampling ratios. This observation was the starting point for the introduction of multi-rate signal processing in analog transceivers. Here (passive) switched-capacitor circuits operating at multiple sampling frequencies are extensively used. This novel approach seems well suited to exploit the benefits of deep-submicron technology, while being less sensitive to its drawbacks.
Operating the analog signal processing chain at various sampling rates poses new challenges. This includes
- the use of the multi-rate switched capacitor systems to decimate/interpolate in advanced technologies and hence at reduced supply voltages;
- the analysis and the modeling of the nonlinear distortions introduced by the switches and the amplifiers;
- exploiting the multi-rate signal processing capabilities to improve sigma-delta circuits.
Aim
The aim of the project is the analysis, modeling and design in multi-rate discrete-time sigma-delta circuits using advanced modeling and signal processing techniques.
Objectives
To realize the goal of the project, 3 objectives are defined:
1. The accurate modeling of nonlinear distortions of multi-rate discrete-time analog circuits by extending the best-linear-approximation (BLA) for time-invariant systems to periodic time-varying systems (responsible partner: VUB).
2. The study of multi-rate discrete-time systems in sigma-delta loops (responsible partner: Ghent University).
3. The application of the introduced BLA models for periodic time-varying systems onto the nonlinear analysis of multi-rate discrete-time sigma-delta circuits (joint responsibility:VUB and Ghent University).
One of the main problems is the lack of voltage headroom. Due to this, conventional analog techniques are unable to fully exploit the cost and the performance benefits of technology scaling. On the other hand multi-GHz switching speeds are easily achieved in deep-submicron CMOS technology. This makes it possible to use discrete-time circuits with massive oversampling ratios. This observation was the starting point for the introduction of multi-rate signal processing in analog transceivers. Here (passive) switched-capacitor circuits operating at multiple sampling frequencies are extensively used. This novel approach seems well suited to exploit the benefits of deep-submicron technology, while being less sensitive to its drawbacks.
Operating the analog signal processing chain at various sampling rates poses new challenges. This includes
- the use of the multi-rate switched capacitor systems to decimate/interpolate in advanced technologies and hence at reduced supply voltages;
- the analysis and the modeling of the nonlinear distortions introduced by the switches and the amplifiers;
- exploiting the multi-rate signal processing capabilities to improve sigma-delta circuits.
Aim
The aim of the project is the analysis, modeling and design in multi-rate discrete-time sigma-delta circuits using advanced modeling and signal processing techniques.
Objectives
To realize the goal of the project, 3 objectives are defined:
1. The accurate modeling of nonlinear distortions of multi-rate discrete-time analog circuits by extending the best-linear-approximation (BLA) for time-invariant systems to periodic time-varying systems (responsible partner: VUB).
2. The study of multi-rate discrete-time systems in sigma-delta loops (responsible partner: Ghent University).
3. The application of the introduced BLA models for periodic time-varying systems onto the nonlinear analysis of multi-rate discrete-time sigma-delta circuits (joint responsibility:VUB and Ghent University).
Date:1 Jan 2008 → 31 Dec 2011
Keywords:electricity
Disciplines:Other engineering and technology