Fine Pitch 3D-Integration Using Self-Aligned Assembly

Due to the higher demand for faster, low power IC chips for Internet-of-Things (IoT) and smart device applications, the need to increase the efficiency, performance and cost reduction of semiconductor chips is of paramount importance. Due to the decreasing rate of transistor scaling, 3D integration is viewed as a solution to build low power and high performance chips. One of the key requirements to enable 3D integration is high interconnect density. Increasing the density of interconnects will decrease the pitch size, which in turn will also decrease the dimensions of the microbumps used in 3D stacking. Smaller microbumps will further reduce the alignment tolerance required in 3D stacking. Present day thermo-compression bonding tools are not able to meet the required alignment tolerances for such scaling. Fluidic self-aligned assembly is seen as a solution to assist fine pitch stacking using a traditional pick and place tool, because of its stochastic nature and low cost process.

In this thesis, we tried to bridge the gap between the proof-of-concept and industrial use of this disruptive technology. Hence, a detailed theoretical study was performed to understand the impact of the lateral placement of a chip and the volume of water, on the final alignment accuracy between the chip and the substrate. The hypothesis drawn from the theoretical study was then proven with the help of experiments. Moreover, we developed a new model to accurately predict the impact of these parameters on capillary time and inertial time at room temperature. Until recently, most of the work done has shown an alignment accuracy of +/- 3 µm. For the first time, a new concept of self-aligned assembly based on rapid heating has been implemented. Using this approach, we show a considerable improvement in alignment accuracy to less than +/- 1 µm.

We also bring forth a new state-of-the-art to understand the impact of heating on the evaporation of water between the chips. Understanding the evaporation rate not only helps in predicting the behavior of chips during rapid heating but also determines the throughput of the final assembly. A detailed analysis and review was performed to understand the mechanism of bonding of inorganic dielectric and copper direct bonding from the perspective of their mechanical properties, surface roughness and surface chemistry. These two types of bonding were later combined to enable hybrid bonding using PTCS chips. Finally, we propose several new self-alignment and assembly concepts which will require a detailed investigation using advanced simulation methods. Their feasibility still needs to be proven by means of experiments.