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Investigation of reliability aspects of STT-MRAM magnetic memory cells.

In this thesis, the impact of self-heating on the reliability of the emerging STT-MRAM memory technology is studied. Memory devices are necessary to ensure the performance of computational electronic devices. In conventional memory devices, the performance is improved through scaling of the device dimensions. Increasingly multi-functional portable electronic devices demand a continued performance improvement at decreasing power densities. However, satisfying this demand by continued scaling of the conventional memory hierarchy becomes difficult. Among the emerging memory technologies being investigated for future generation applications is spin-transfer torque magnetic RAM (STT-MRAM). With properties including high endurance, high speed, non-volatility, CMOS compatibility at low power consumption, MRAM offers great opportunity. In addition, this magnetic-based memory, as opposed to conventional charge-based, has great scaling potential.


To enable this technology, reaching the reliability specifications is crucial. The tunnel barrier in STT-MRAM is 1 nm thick, through which high operating current densities of 1 MA/cm² flow, potentially causing breakdown and limiting the lifetime. The lifetime of the devices is estimated relying on models built for CMOS technologies, that do not take into account the contribution from self-heating. Self-heating is the phenomenon whereby the on-state device temperature increases as a result of the large currents flowing. In STT-MRAM, the impact of how the generated self-heating affects breakdown and the corresponding lifetime extrapolations has thus far not been studied in detail.


We have extended the breakdown model by incorporating the effect of self-heating, which is shown to increase device temperature by as much as 300 °C during measurement. We establish that the tunnel barrier thickness and device dimensions play dominant roles in the self-heating mechanism. An in-depth analysis corroborated by large measured breakdown statistics using (1) a breakdown time range of more than 11 orders of magnitude and (2) different tunnel barrier thicknesses is performed. In addition, we explain how oxygen diffusion reduces the resilience to breakdown. Furthermore, we find that scaling down the device dimensions and tunnel barrier thickness will further increase the reliability margin between breakdown and writing current.


In addition, STT-MRAM is a non-volatile memory and therefore retains its memory state when the power is turned off, i.e. off-stress. Insufficient data retention can result in loss of this non-volatility. Data retention is defined by the energy barrier at off-stress conditions. Extracting this energy barrier requires switching the device at accelerated conditions and extrapolating to off-stress conditions, relying on simplified switching models. We perform a thorough evaluation of this extrapolation, and provide a baseline for validating which model most accurately describes the extrapolation to off-stress conditions. To achieve this baseline, a combination of temperature, magnetic field and current acceleration, including self-heating, are implemented.

Date:3 Sep 2013 →  27 Aug 2018
Keywords:STT-MRAM, reliability, breakdown, self-heating
Disciplines:Nanotechnology, Design theories and methods
Project type:PhD project