Modeling and characterization of UT-FDSOI devices and their long term reliability at cryogenic temperatures

As CMOS technology is scaling down, Advanced UT-FDSOI devices are widely applied in CMOS nanoscale applications due to their excellent immunity to short channel effect (SCE), high mobility, and high switching current ratio. These UT-FDSOI devices co-integrated with ICs operate at cryogenic temperatures (4 K or even lower) when used for particle detection, high-performance computing, cryogenic sensors and detectors, space electronic, low power neuromorphic circuits, and quantum ICs, therefore their characteristics and reliability at cryogenic temperatures should be investigated clearly. Some effects will influence their performance and reliability at cryogenic temperatures, like increasing hot-carrier induced degradation (HCI), which can impact the lifetime of these devices. The proposed PhD thesis intends to derive the analytical models of the advanced UT-FDSOI devices at cryogenic temperatures and verify them by the measurements and simulations. The changing trend of their characteristic parameters could be concluded from our models, and the long-term reliability of these advanced devices at cryogenic temperatures could be investigated for future quantum computing ICs design and RF applications.