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Researcher
Filip Tavernier
- Disciplines:Nanotechnology, Sensors, biosensors and smart sensors, Other electrical and electronic engineering, Design theories and methods
Affiliations
- Electronic Circuits and Systems (ECS) (Division)
Member
From1 Aug 2020 → Today - Assiocated Division ESAT-INSYS (INSYS), Integrated Systems (Division)
Member
From1 Aug 2020 → 31 Dec 2008 - Department of Electrical Engineering (ESAT) (Department)
Member
From1 Apr 2006 → 18 Nov 2007 - ESAT - MICAS, Microelectronics and Sensors (Division)
Member
From17 Oct 2005 → 31 Jul 2020
Projects
1 - 10 of 28
- Extreme High Speed ADCFrom12 Mar 2024 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- High voltage, low power DC-DC convertersFrom13 Oct 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Scalable large array nanopore readouts for proteomics and next-generation sequencingFrom2 Oct 2023 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Essential Technologies for the Einstein TelescopeFrom1 Jan 2023 → TodayFunding: FWO International research infrastructure (IRI)
- Cryogenic Oscillators and ClocksFrom1 Nov 2022 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Cryogenic measurement platforms for quantum technologiesFrom1 May 2022 → TodayFunding: FWO Medium Size Research Infrastructure
- GARLIC: a Generic ARchitecture of a Low-loss Integrated Converter, eliminating Vampire PowerFrom1 Oct 2021 → TodayFunding: IOF - technology validation in lab
- An energy-efficient voltage-time hybrid ADC with high linearity and PVT insensitivityFrom27 Sep 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Cryo-CMOS circuits for quantum computingFrom1 Sep 2021 → TodayFunding: FWO fellowships
- High speed, radiation-tolerant optical and wireline communication circuitsFrom29 Jan 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
Publications
21 - 30 of 80
- Integrated Opto-Electronics in Bulk CMOS for Telecommunications(2020)
Authors: Wouter Diels, Filip Tavernier, Michiel Steyaert
- A 119dB Dynamic Range Charge Counting Light-to-Digital Converter For Wearable PPG/NIRS Monitoring Applications(2020)
Authors: Qiuyang Lin, Chris Van Hoof, Filip Tavernier
Pages: 800 - 810 - A 4-GS/s 39.9-dB SNDR 11.7-mW Hybrid Voltage-Time Two-Step ADC With Feedforward Ring Oscillator-Based TDCs(2020)
Authors: Yifan Lyu, Filip Tavernier
Pages: 1807 - 1818 - 1310/1550 nm Optical Receivers With Schottky Photodiode in Bulk CMOS(2020)
Authors: Wouter Diels, Michiel Steyaert, Filip Tavernier
Pages: 1776 - 1784 - A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog-Digital Corrections in 28-nm CMOS(2020)
Authors: Athanasios Ramkaj, Marcel Pelgrom, Michiel Steyaert, Marian Verhelst, Filip Tavernier
Pages: 1553 - 1564 - A new feedback strategy to boost Q-factor of charge-sharing bandpass filters(2020)
Authors: Michiel Steyaert, Filip Tavernier
- Advanced Design of Schottky Photodiodes in Bulk CMOS for High Speed Optical Receivers(2020)
Authors: Wouter Diels, Michiel Steyaert, Filip Tavernier
- A 4V-0.55V Input Fully Integrated Switched-Capacitor Converter Enabling Dynamic Voltage Domain Stacking and Achieving 80.1% Average Efficiency(2020)
Authors: Tim Thielemans, Filip Tavernier
Number of pages: 2 - A Four-Quadrant Switched Capacitor DC-DC Convertor Enabling Power-Efficient Lab-Grade Potentiostats(2020)
Authors: Tim Thielemans, Tom Molderez, Marian Verhelst, Filip Tavernier
Pages: 658 - 664 - A 1 GS/s Reconfigurable BW 2nd-Order Noise-Shaping Hybrid Voltage-Time Two-Step ADC Achieving 170.9 dB FoMS(2020)
Authors: Yifan Lyu, Filip Tavernier
Number of pages: 2
Patents
1 - 1 of 1
- Light-to-digital converter (Inventor)