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Researcher
Guido Groeseneken
- Disciplines:Modelling, Multimedia processing, Sensors, biosensors and smart sensors, Other electrical and electronic engineering, Other engineering and technology
Affiliations
- Electronic Circuits and Systems (ECS) (Division)
Member
From1 Aug 2020 → Today - ESAT - MICAS, Microelectronics and Sensors (Division)
Member
From1 Jan 2008 → 31 Jul 2020 - Department of Electrical Engineering (ESAT) (Department)
Member
From1 Oct 2001 → 30 Sep 2007
Projects
1 - 10 of 29
- Transient-induced Latchup (TLU) Exploration in System-Technology Co-Optimization (STCO) Scaling EraFrom4 Jun 2020 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Fundamental and practical aspects of gate oxide breakdown in VLSI technologies beyond 7nmFrom4 Dec 2019 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Physical modelling and optimization of ferroelectric FETs for memory applications.From10 May 2019 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Characterization and modelling of superconducting qubitsFrom31 Jan 2019 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- ESD Protection Design for RF & mm-Wave Circuits in CMOS TechnologiesFrom4 Sep 2018 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
- Development of Reliable Gate Stacks for Stacked MOS Devices in a 3D Sequential IntegrationFrom26 Sep 2017 → 13 Apr 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
- Unified Physics-Based Model of Degradation of FinFETs and Nanowire FETs for beyond 7 nm TechnologiesFrom21 Sep 2017 → TodayFunding: FWO fellowships
- Modelling, exploration and technology assessment of steep-subthreshold-slope transistors for N5/N3 CMOS power-performance scalingFrom31 Mar 2017 → 31 Mar 2021Funding: Own budget, for example: patrimony, inscription fees, gifts
- Reliability and Integration of GaN Power Devices and Circuits on GaN-on-SOIFrom24 Feb 2017 → 24 Nov 2020Funding: Own budget, for example: patrimony, inscription fees, gifts
- Feasibility of nanowire tunnel-FETs using dopant atoms for future ultra-low power CMOS-applications.From1 Oct 2016 → 2 Jun 2021Funding: FWO Strategic Basic Research Grant
Publications
1 - 10 of 541
- LaSiOx- and Al2O3-Inserted Low-Temperature Gate-Stacks for Improved BTI Reliability in 3-D Sequential Integration(2022)
Authors: Zhicheng Wu, Guido Groeseneken
Pages: 915 - 921Number of pages: 7 - Investigation of the Impact of Hot-Carrier-Induced Interface State Generation on Carrier Mobility in nMOSFET(2021)
Authors: Zhicheng Wu, Guido Groeseneken
Pages: 3246 - 3253Number of pages: 8 - Modeling and Calibration of Device Non-Idealities in Steep-Slope Devices(2021)
Authors: Jasper Bizindavyi, Guido Groeseneken, Bart Sorée
- Investigating the Current Collapse Mechanisms of p-GaN Gate HEMTs by Different Passivation Dielectrics(2021)
Authors: Zhicheng Wu, Guido Groeseneken
Pages: 4927 - 4930Number of pages: 4 - Modeling of Repeated FET Hot-Carrier Stress and Anneal Cycles Using Si-H Bond Dissociation/Passivation Energy Distributions(2021)
Authors: Michiel Vandemaele, Guido Groeseneken
Pages: 1454 - 1460Number of pages: 7 - GaN power IC design using the MIT virtual source GaNFET compact model with gate leakage and V-T instability effect(2021)
Authors: Guido Groeseneken
Number of pages: 5 - High Speed MRAM with Voltage Control of Magnetic Anisotropy (VCMA) Effect(2021)
Authors: Yueh Chang Wu, Guido Groeseneken, Jan Van Houdt
- Integration of GaN analog building blocks on p-GaN wafers for GaN ICs(2021)
Authors: Guido Groeseneken
Number of pages: 4 - Effects of Back-Gate Bias on the Mobility and Reliability of Junction-Less FDSOI Transistors for 3-D Sequential Integration(2021)
Authors: Zhicheng Wu, Guido Groeseneken
Pages: 464 - 470Number of pages: 7 - Reliability of p-GaN Gate HEMTs in Reverse Conduction(2021)
Authors: Guido Groeseneken
Pages: 645 - 652Number of pages: 8