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Researcher
Guruprasad Katti
- Disciplines:Nanotechnology, Design theories and methods
Affiliations
- Assiocated Division ESAT-INSYS (INSYS), Integrated Systems (Division)
Member
From1 Aug 2020 → 31 May 2011 - Associated Section of ESAT - INSYS, Integrated Systems (Division)
Member
From15 Mar 2011 → 31 May 2011 - Department of Electrical Engineering (ESAT) (Department)
Member
From8 Jan 2007 → 14 Mar 2011
Publications
1 - 10 of 12
- Test structures for characterization of through-silicon vias(2012)
Authors: Guruprasad Katti, Wim Dehaene
Pages: 355 - 364 - Technology assessment of through-silicon via by using C-V and C-t Measurements(2011)
Authors: Guruprasad Katti, Kristin De Meyer, Wim Dehaene
Pages: 946 - 948 - Temperature-dependent modeling and characterization of Through Silicon Via (TSV) capacitance(2011)
Authors: Guruprasad Katti, Kristin De Meyer, Wim Dehaene
Pages: 563 - 565 - TSV characterization and modeling(2011)
Authors: Guruprasad Katti
Pages: 33 - 49Number of pages: 17 - Design issues and considerations for low-cost 3-D TSV IC technology(2011)
Authors: Guruprasad Katti, Ingrid De Wolf, Michal Rakowski, Wim Dehaene
Pages: 293 - 307 - Impact of thinning and through silicon via proximity on high-k / metal gate first CMOS performance(2010)
Authors: Yu Yang, Guruprasad Katti, Chukwudi Okoro, Panagiotis Asimakopoulos, Ingrid De Wolf
Pages: 109 - 110 - Test structures for characterization of through silicon vias(2010)
Authors: Guruprasad Katti, Wim Dehaene
Pages: 130 - 134 - Electrical modeling and characterization of through silicon via for three-dimensional ICs(2010)
Authors: Guruprasad Katti, Kristin De Meyer, Wim Dehaene
Pages: 256 - 262 - 3D stacked ICs using Cu TSVs and die to wafer hybrid collective bonding(2009)
Authors: Guruprasad Katti, Kristin De Meyer
Pages: 331 - 334 - 3D Stacked IC demonstrator using hybrid collective Die-to-Wafer bonding with copper through silicon vias (TSV)
Authors: Wim Dehaene, Kristin De Meyer, Guruprasad Katti
Pages: 1 - 5