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Researcher
Marc Heyns
- Disciplines:Ceramic and glass materials, Materials science and engineering, Semiconductor materials, Other materials engineering
Affiliations
- Surface and Interface Engineered Materials (SIEM) (Division)
Member
From1 Aug 2020 → Today - Surface and Interface Engineered Materials (Division)
Member
From1 Jan 2012 → 31 Jul 2020 - Department of Materials Engineering (Department)
Member
From1 Oct 2007 → 31 Dec 2011 - Department of Electrical Engineering (ESAT) (Department)
Member
From1 Oct 2005 → 30 Sep 2007
Projects
1 - 10 of 28
- OPERANDO: In-situ observations of the dynamic processes inside the atomic resolution transmission electron microscopeFrom1 May 2020 → TodayFunding: FWO Medium Size Research Infrastructure
- Magnetoacoustic wave devices for ultralow power spintronicsFrom19 Jun 2019 → TodayFunding: FWO Strategic Basic Research Grant
- 2D Materials: Theoretical study of Magnetic and Contact propertiesFrom7 Dec 2018 → 20 Oct 2023Funding: Own budget, for example: patrimony, inscription fees, gifts
- Micromagnetic simulations for boolean and non-boolean logicFrom1 Sep 2018 → 31 Dec 2022Funding: FWO Strategic Basic Research Grant
- Interface Engineering for Performance Enhancement in 2D Field Effect TransistorsFrom3 Aug 2018 → 14 Mar 2024Funding: Own budget, for example: patrimony, inscription fees, gifts
- Understanding Interface Interactions in Graphene-Ruthenium Hybrids for Next Generation InterconnectsFrom6 Nov 2017 → 12 Jan 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
- Design and Characterization of Quantum Sillicon-Based Devices for Semiconducting Qubit Implementation.From1 Oct 2017 → 31 Mar 2022Funding: FWO Strategic Basic Research Grant
- Fundamental challenges for two dimensional semiconductorsFrom1 Oct 2017 → 30 Sep 2021Funding: Fund Recuperation Fiscal Exemption
- Design and Characterization of Quantum Devices for Superconducting Qubit ImplementationFrom20 Sep 2017 → 19 Aug 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
- Electrical Modelling and Characterization of Extended Defects in n Type InxGa1-xAs SystemFrom23 Aug 2017 → 11 Jan 2022Funding: Own budget, for example: patrimony, inscription fees, gifts
Publications
41 - 50 of 534
- Fundamental limitation of van der Waals homoepitaxy by stacking fault formation in WSe2(2020)
Authors: Wouter Mortelmans, Yashwanth Balaji, Michel Houssa, Stefan De Gendt, Marc Heyns, Clement Merckling
- Electrical Activity of Extended Defects in Relaxed InxGa1-xAs Hetero-Epitaxial Layers (vol 9, 033001, 2020)(2020)
Authors: Clement Merckling, Marc Heyns
- Electrical Activity of Extended Defects in Relaxed InxGa1-xAs Hetero-Epitaxial Layers(2020)
Authors: Po-Chun Hsu, Clement Merckling, Marc Heyns
- 50 nm Gate Length FinFET Biosensor & the Outlook for Single-Molecule Detection(2020)
Authors: Sybren Santermans, Marc Heyns
Number of pages: 4 - All-electrical control of scaled spin logic devices based on domain wall motion(2020)
Authors: Eline Raymenants, Marc Heyns
Pages: 25.5.1 - 25.5.4 - The impact of extended defects on the generation and recombination lifetime in n type In.53Ga.47As(2019)
Authors: Po-Chun Hsu, Clement Merckling, Marc Heyns
- Peculiar alignment and strain of 2D WSe2 grown by van der Waals epitaxy on reconstructed sapphire surfaces(2019)
Authors: Wouter Mortelmans, Johan Meersschaut, Stefan De Gendt, Marc Heyns, Clement Merckling
- Assessing stability of metal tellurides as alternative photomask materials for extreme ultraviolet lithography(2019)
Authors: Marc Heyns
- Positive non-linear capacitance: the origin of the steep subthreshold-slope in ferroelectric FETs(2019)
Authors: Md Nur Kutubul Alam, Marc Heyns, Jan Van Houdt
- Observation of the Stacking Faults in In0.53Ga0.47As by Electron Channeling Contrast Imaging(2019)
Authors: Po-Chun Hsu, Han Han, Clement Merckling, Marc Heyns
Patents
1 - 7 of 7
- Tunnel field effect transistor device and method for making the device (Inventor)
- Graphene based field effect transistor (Inventor)
- A bilayer graphene tunneling field effect transistor (Inventor)
- Bilayer graphene tunneling field effect transistor (Inventor)
- Graphene-based semiconductor device (Inventor)
- Tunnel field effect transistor device and method for making the device (Inventor)
- Graphene based field effect transistor (Inventor)