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Researcher
Shirui Zhao
- Disciplines:Digital integrated circuits, Processor architectures
Affiliations
- Electronic Circuits and Systems (ECS) (Division)
Member
From3 Aug 2020 → Today
Projects
1 - 1 of 1
- HW-algorithm co-design for approximate inference of probabilistic machine learningFrom7 May 2021 → TodayFunding: Own budget, for example: patrimony, inscription fees, gifts
Publications
1 - 3 of 3
- DPU: DAG Processing Unit for Irregular Graphs With Precision-Scalable Posit Arithmetic in 28 nm(2022)
Authors: Nimish Shirishbhai Shah, Shirui Zhao, Wannes Meert, Marian Verhelst
Pages: 1 - 11 - Discrete Samplers for Approximate Inference in Probabilistic Machine learning(2022)
Authors: Shirui Zhao, Nimish Shirishbhai Shah, Wannes Meert, Marian Verhelst
Pages: 1221 - 1226 - PIU: A 248GOPS/W Stream-Based Processor for Irregular Probabilistic Inference Networks Using Precision-Scalable Posit Arithmetic in 28nm(2021)
Authors: Nimish Shirishbhai Shah, Shirui Zhao, Wannes Meert, Marian Verhelst
Pages: 1 - 3