Modeling and Optimization of Plasmonic Detectors for Beyond-CMOS Plasmonic Majority Logic Gates KU Leuven
In this work, we report the modeling and design of a high-speed Ge-based plasmonic detector coupled with a Metal-Insulator-Metal (MIM) plasmonic majority gate. The detector is designed to distinguish between multiple output levels of the integrated majority gate. Through numerical analyses we predict the proposed plasmonic detector has an intrinsic bandwidth beyond 220 GHz at an applied bias of only 100 mV . An asymmetric ...