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Contact to Semiconducting Transition Metal Dichalcogenides

Boek - Dissertatie

The CMOS industry has made great strides in achieving enormous computational power by downscaling the metal oxide semiconductor field-effect transistors (MOSFETs). Various technological innovations have been instrumental in achieving this transistor miniaturization. This scaling is reaching its limits as short channel effects (SCE) significantly degrade the device performance. To enhance the electrostatic control and overcome SCE, structures such as FinFETs and gate-all-around (GAA) FETs sandwich thin layers of Silicon channel between multiple gates. Though this allows for gate length scaling up to 10 nm, the required silicon channel thickness for scaling below 10 nm would severely degrade the carrier mobility due to increased surface roughness scattering. In this context, two-dimensional (2D) semiconducting materials are considered as suitable alternatives. Theoretically, these materials are atomically thin, and their surfaces are naturally passivated, thus, providing excellent gate control and enhanced carrier transport. However, practical devices are limited by several challenges. One of the most important challenges is the high contact resistance (RC) due to the formation of a Schottky barrier at the metal-2D semiconductor interface. In this thesis, we study in detail the impact of Schottky contacts on the electrical performance of 2D semiconductor FETs. Molybdenum disulphide (MoS2) will be used as the representative 2D semiconductor. In the first part of the thesis, we develop a stable and scalable process flow that allows us to reliably fabricate a large set of devices covering a wide range of device dimensions on grown MoS2 films. Here, one of the main goals has been to minimize the adverse effects of fabrication on the MoS2 channel, thereby enabling us to study the intrinsic MoS2 characteristics. Using this flow, we compare the validity of the different electrical test structures in quantifying parameters related to the contact and sheet properties of the 2D semiconductor. We provide design considerations for four-probe (4P) and transmission line measurement (TLM) structures and demonstrate consistency and a high level of accuracy in the extracted parameters across the structures. Further, we propose a robust statistical procedure that can be readily used with the TLM method to improve parameter extraction for large area 2D materials that might be prone to intrinsic variability. Among other observations, we identify a strong gate field-dependent contact resistance for back-gated MoS2 devices that decreases monotonically from the subthreshold to the strongly accumulated regime. For the subthreshold region, using temperature-dependent measurements, we show that this RC decrease is due to the large tunneling current through the Schottky barrier as the barrier width is reduced with the gate field. However, in the strongly accumulated region, it is not known what decreases the RC. In the second part of the thesis, we understand this observation by developing a semiclassical simulation methodology and experimentally verifying the model predictions. The approach combines the drift-diffusion carrier transport model for channel region with a non-local tunneling model for transport across the Schottky junctions. Based on the simulations, we identify two main paths for carrier injection from the metal into the MoS2 channel and that their modulation with the back-gate field results in RC modulation. We find that one such path, where carriers tunnel via an oblique trajectory from the metal into the channel, is the dominant one for thinner layers of MoS2, specifically 1-3 monolayers. We provide conclusive evidence for this hypothesis by demonstrating the absence of any statistically significant difference in the electrical performance of devices with long and ultra-scaled contact lengths (down to 13 nm). Using this finding, we also propose a new scaling rule for Schottky contacted 2D semiconductor devices and suggest strategies to reduce RC. We also elucidate the impact of the Schottky contacts in the different device operation regimes by comparing the simulations and experiments of different channel length devices. In the subthreshold region, we identify that the quality of the channel-oxide interface or SCE limits the subthreshold slope (SS) for gate-bias below flat band voltage (VFB) and the Schottky barrier limits SS for above VFB. We also present a variability study investigating the impact on the SS due to MoS2 thickness variations along the contact width. In the strongly accumulated regime, the proximity of the metal contacts to the channel enables efficient carrier tunneling, reducing the non-linear response of drain current with drain-source bias, typically expected for Schottky contacts. Further, we demonstrate that for a high driving field in the device, the Schottky contacts are transparent, and carrier velocity saturation intrinsic to the 2D channel can be observed. Finally, we conclude with a discussion on the contact and channel parameters that could affect the device drive current and possible extensions for the model.
Jaar van publicatie:2021
Toegankelijkheid:Open