Impact of Emerging Electrical and Optical 3D Integration Technologies on High Bandwidth Interconnect Systems

The performance of an electronic system is limited by the speed at which data is exchanged between its different sub-systems (Central Processing Unit (CPU), Graphics Processing Unit (GPU), memory, accelerators, analog circuits) and the speed at which this data is processed. The industry uses the System-on-Chip (SoC) concept, which combines some of the sub-systems on the same dies to improve the performance. However, not all parts of the system can fit on the same die, and the cost associated with the CMOS technology scaling makes this solution less and less viable. The continuous development of packaging solutions has made it possible to integrate some of the different sub-systems inside the same package. This integration reduces the communication distance, which in turn leads to an increase in the data rate and the number of interconnections. The latter is made possible by the use of advanced lithography processes, unavailable for off-package interconnects. Technologies such as silicon interposer, Embedded Multi-Die Interconnect Bridge (EMIB), Local Silicon Interposer (LSI), Fan-Out Wafer Level Package (FO-WLP) enable sub-micron interconnects for chip-to-chip communications inside the package. Together with CMOS technology scaling, the performance of our electronic devices has constantly improved since the invention of the first integrated circuit in 1958. Over the past decades, optical links have emerged as the ultimate solution for high-performance mid- and long-reach communications (meters to kilometers distances) as they outperform their electric counterparts both in terms of power and bandwidth. Among the existing photonic technologies, Silicon Photonics (SiPh) has become very popular as it is built based on well-established CMOS process flows, leveraging the investments made for decades in the fabs. For short-reach (in-package) communications, optical links are, to this day, considered too power-hungry to constitute a strong alternative to electrical links, although their data rates can be significantly higher. However, the development of low-loss optical components and new packaging technologies reduce the power consumption, and in a near future, some of the electrical interconnects might be replaced with optical links. In order to compare in-package electrical and optical links, design and optimization tools have been developed in this work to quantify and optimize the bandwidth density and energy-per-bit of different systems. These tools are used to evaluate the influence of several link parameters on these two metrics. The parameters are interconnection length, bump pitch scaling, load parasitics, voltage swing, and driving strength for electrical links. For optical links, the influence of modulators, interconnection length, data rate, and chip temperature is evaluated. The latter is an essential point of attention because the SiPh technology is sensitive to temperature variations, particularly the modulator. To compensate for these variations, local heaters are used, and they have a significant impact on the energy-per-bit. In addition to the modelling part, a prototype 7mm long chip-to-chip electrical link on a silicon interposer has been build. The CMOS dies are designed and fabricated in a 14nm FinFET technology, and the interposer is fabricated by imec with a 65nm CMOS BEOL technology. Its purpose is to better characterize and compare two different optimized electrical interfaces. The first one is comparable to current logic-to-memory electrical links operating at a 1.2V swing and the second is a low-swing electrical interface optimized for low energy-per-bit and higher bandwidth density. The experiment carried out has shown, for the 1.2V swing, a bandwidth density of 1.43Tbps/mm for an energy-per-bit of 1pJ/bit. On the other hand, the low-swing improves the bandwidth density to 2.57Tbps/mm because of the higher data rate, with three times lower energy-per-bit (338fJ/bit) than the 1.2V swing interface. In comparison, the optical link study shows that for the same FinFET technology, with a Quantum-Confined Stark Effect (QCSE) Electro-Absorption Modulator (EAM) together with a wafer-to-wafer (W2W) hybrid bonding scheme, the energy-per-bit of an in-package optical link can be reduced down to 0.4pJ/bit around 8Gbps, representing a minimum bandwidth density of 0.8Tbps/mm. Furthermore, the reduced parasitics induced by the wafer-to-wafer bonding make it possible to increase the data rate beyond 60Gbps, with an energy-per-bit still below 1pJ/bit and bandwidth densities above 6Tbps/mm. One of the significant advantages of optical links is their insensitivity to interconnection length due to the low losses in the optical waveguides. In comparison, the power consumption and the bandwidth density of electrical links are highly dependent on the communication distance. By extrapolating the results from the electrical link prototype as a function of the interconnection length, the break-even point between electrical and optical links for in-package communications can be estimated. Finally, using the bandwidth density divided by the energy-per-bit as a benchmarking metric, the break-even point lies at an interconnection length of 13mm for an optical link optimized for the lowest-energy-per-bit compared to the low-swing electrical interface. On the other hand, if an optical link is optimized for maximum throughput, the break-even point moves down to 4mm. The future will tell whether or not SiPh technologies will replace medium-range electrical in-package links, but this thesis has already paved the way, and has identified the major bottlenecks and key components to enable this major technology breakthrough. Recent developments on QCSE EAMs and W2W hybrid bonding suggest optical links a promising future. However, the electrical links will not disappear any time soon and will also benefit from the technological advances in bonding techniques, which will reduce their power consumption further.

Jaar van publicatie:2021

Toegankelijkheid:Open