Low-k materials engineering for 10 nm technology node and beyond

A simple and yet indispensable part of every microelectronics chip is a multi-level wiring (interconnect) system built on top of the semiconductor device layer. This system is responsible for signal transmission between functional nodes of an integrated circuit. While in the early days of microelectronics the IC performance was largely defined by the operational speed of the devices built within the semiconductor surface, the decades of exponential increase in the device density led to the situation where the signal propagation delay became comparable to the device switching rate thus limiting the overall computational performance of a chip. Moreover, the electrical interconnects are responsible for more than 50% consumption of the total power in today's microprocessor which poses a great challenge for energy-efficient computation, like in handheld devices. There are multiple innovative solutions being developed for the alleviation of the above interconnect challenges at different levels starting from the system level and going down to the materials level, which compose the on-chip interconnects - metals and dielectrics. The seminal transition from a traditional metallization scheme based on Al and SiO2 to a damascene processing featuring more conductive Cu metal and less polarizable low-k dielectrics occurred in the late 90s. While Cu is still a metal of choice in today's most advanced interconnects, no single low-k dielectric material can be termed as a universal insulation solution. The long list of sometimes self-contradicting requirements for an optimal low-k dielectric in combination with multiple diverse classes of dielectric materials led to extensive research ranging from simple evaluation of new material candidates to exploration of novel material integration schemes. The current work explores two classes of low-k dielectrics - spin-on organosilica glasses (SOG) and metal-organic frameworks. The porous SOGs have been under evaluation since the beginning of nillies, but the early versions failed to compete with analogous PECVD SiOCH dielectrics. Only when the highly porous ultra-low-k dielectrics with k-values below 2.5 were considered, the SOGs got a second chance thanks to the possibility to fine-tune the composition of organosilica matrix and to better control over the pore structure compared to the PECVD analogs. As SOG materials can be considered a relatively mature class of dielectrics, the full spectrum of material properties as well as their integration into a damascene metallization layer has been explored. Since one of the key properties of low-k dielectrics is the balance between k-value and mechanical strength, the effects of pore structure as well as of the organosilica matrix composition on Young's modulus and cohesion strength have been studied in SOGs. The pore structure was modulated by exchanging the type of polyethylene oxide (PEO)-based surfactant used as a porogen in the original sol solution. Similarly, the composition of the organosilica backbone was adjusted by adding to the sol various organosilica esters including carbon chains in the form of terminal or bridging functional groups. The analysis of porosity and pore size distribution of the prepared SOGs by ellipsometric porosimetry along with the characterization of mechanical properties by nanoindentation and 4-point-bending test allowed concluding on the importance of reduced pore dimensions for enhancement in material's crack resistance. The same set of evaluation techniques complemented with quantitative IR-spectroscopy analysis was used to demonstrate the key role of matrix connectivity in the improvement of the material's Young's modulus and fracture toughness. Besides the k-value and mechanical properties, one of the key intrinsic parameters of a low-k dielectric is its ability to resist the charge transfer, which adds up to the chip power consumption and is largely responsible for the electrical reliability failure. One of the contributions to the leakage current in porous organosilica materials are residues from the sacrificial organic phase, which is particularly difficult to eliminate in the case of typical PECVD SiOCH dielectrics. The analysis of the PEO-based surfactant thermal decomposition in the porous SOG dielectric under study clearly showed that incomplete removal of the surfactant results in increased leakage current associated with carbon-based defect states in the dielectric's band gap. In turn, the combination of thermal annealing with successive UV-curing allows not only to shorten the SOG material preparation time due to the accelerated sacrificial carbon removal but also results in a residue-free organosilica backbone with improved insulating properties. The integration of highly porous SOG dielectrics in on-chip interconnects is associated with multiple challenges related to undesirable in-diffusion of processing gases/liquids, plasma species, or interfacial materials inside the porous network. Such in-depth modification of low-k dielectrics results in the integration of a dielectric material with noticeably degraded electrical properties. In the scope of this work, the concept of using surfactant residues for the protection of the organosilica backbone has been explored with respect to plasma-induced damage during SOG material etching and to the damage caused by the formation of continuous PVD TaN/Ta metal barrier. It has been shown that retention of the organic template residues uniformly distributed throughout the porous layer enables damage-free plasma etching and helps to achieve pore sealing with thinner PVD metal barriers. The successive single damascene integration study further demonstrated the applicability of the proposed template residue-based protection strategy. Another category of low-k dielectric materials studied in this work are zeolitic imidazolate frameworks (ZIFs), a sub-class of metal-organic frameworks (MOFs) exhibiting exceptionally high thermal and chemical stability. Unlike organosilica dielectrics, the research on MOFs as low-k dielectrics is still in its infancy, and the majority of the published work focuses on the assessment of intrinsic dielectric properties of various MOFs. The current work makes a step forward by additionally evaluating the integration of ZIF-8 and ZIF-67 materials in on-chip interconnects. The central spot in the proposed integration scheme belongs to a novel MOF-CVD deposition process which consists in the solvent-free conversion of metal oxide in the respective MOF layer. The conversion of a metal oxide precursor layer deposited over a pre-formed pattern demonstrated the seamless filling of narrow trenches with the crystalline ZIF-8/ZIF-67 dielectric. The good balance of k-value and Young's modulus of ZIF dielectrics (on par with traditional organosilica dielectrics) in combination with the good gap-filling performance makes ZIF dielectrics appealing for integration into ruthenium-based metallization where Ru pattern is formed before the insulation layer. To summarize, the performed research demonstrates that both porous spin-on organosilica glasses and metal-organic frameworks can provide a viable alternative to PECVD SiOCH low-k dielectrics used in the modern on-chip interconnects. The precise control over the backbone composition and the pore volume distribution in porous SOGs allows the preparation of coatings with superior mechanical properties. At the same time, the controlled decomposition of the sacrificial porogen phase in SOGs allows a sizable reduction in the integration-induced damage thus enabling the incorporation of highly porous dielectrics in the classical damascene interconnects. On the other hand, metal-organic frameworks featured with intrinsic crystallinity, microporosity, relatively high Young's modulus, and low dielectric constant have been found to be a good candidate for integration in the post-damascene interconnects where void-free gap-filling of high-aspect-ratio trenches in-between metal wires becomes an essential requirement to a low-k dielectric.

Jaar van publicatie:2022

Toegankelijkheid:Open