A method for defining a channel region in a vertical transistor device Vrije Universiteit Brussel
Julien Ryckaert, Naoto Horiguchi, Dan Mocuta, Bao Trong Huynh
A method for defining a channel region in a vertical transistor device is disclosed. The method comprises providing, on a substrate, a fin (504, 505, 506) formed of a stack of a first layer (501), a second layer (502) and a third layer (503), wherein the second layer is positioned above the first layer and the third layer is positioned above the second layer, selectively forming a dielectric (507) on the sidewalls of the first and third layer of the fin, and forming a gate contacting layer (509) for contacting a sidewall of the second layer. The first and third layer defines a source and ...