A Binary Adaptable Window SoC Architecture for a StereoVision Based Depth Field Processor

Abstract:This paper presents a novel binary fully adaptable window for incorporating in a stereo matching System-on-Chip (SoC) architecture. This architecture is fully scalable and parameterizable to allow for custom SoC implementations, as well as rapid prototyping on FPGAs. For each window a binary mask window is generated which selects the supporting pixels in the cost aggregation phase of the SAD algorithm. This selection is performed using color similarity and spatial distance metrics. Hardware resource utilization for a fixed window and an adaptable window cost aggregation is compared based on FPGA logic element use.

ISBN:978-1-4244-6470-8

Publication year:2010

Keywords:component, stereo matching, adaptable window, cost aggregation, computer vision, System-on-Chip, FPGA

BOF-keylabel:yes

IOF-keylabel:yes

Accessibility:Open

Review status:Peer-reviewed