Stt-assisted sot-mram bit cell

According to an aspect of the present inventive concept there is provided a method for controlling a magnetoresistive random access memory, MRAM, bit-cell comprising a first transistor (10), a second transistor (20), and a resistive memory element (30), comprising a magnetic tunnel junction, MTJ, pillar arranged between a top electrode (350) and bottom electrode having a first terminal (342) and a second terminal (344). According to a second aspect, there is provided a magnetoresistive random access memory, MRAM, bit cell.

Patent Publication Number: EP3671749

Year filing: 2021

Year approval: 2021

Year publication: 2021

Status: Assigned

Technology domains: Computer technology

Validated for IOF-key: Yes

Attributed to: Associatie KULeuven