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Evaluation of Alternative Vertical Transistors for 3D NAND Applications

The need for reliable, cheap and dense memory devices has never been so important specially with the inception of Internet of Things (IoT) which will
require further expansion in data storage solutions. Flash NAND technology has been playing a crucial role in this on-going expansion and has become
a driving force in the semiconductor industry. This memory is cost-effective, dense, robust, and non-volatile. This technology suffers, however, from a few
drawbacks, such as slow speed, large cell size and high power consumption at chip level due to required periphery (e.g. charge pumps). Looking for alternative memories without these issues while keeping the advantages of this technology is therefore very attractive.

As of today, 3-D NAND technology has no potential replacement candidate and among the storage class memory (SCM) devices, neither have comparable
properties. Addressing the 3-D NAND issues while keeping the advantages of this technology would be very appealing. Such device would be a serious candidate for 3-D NAND replacement and/or storage-type SCM. The discovery in 2010 of ferroelectric hafnium oxide (FE-HfO2), which spontaneous polarization can be reversed with the application of an electric field, has generated a regained interest in FE memories. Ferroelectricity can enable devices with low power consumption and fast speed.

In this thesis, a novel memory concept is investigated which combines the advantages of the ferroelectricity through the application of FE-HfO2 films
in a vertical architecture while retaining the high density of the vertical 3-D NAND structure. Using planar capacitors, the influence of multiple factors on
FE properties is thoroughly investigated and an optimized film is developed for further 3-D integration. In-depth studies of two specific effects in FE, wake-up
and imprint, are conducted. Empirical models are proposed to describe the origin of these phenomena. The optimized FE-HfO2 films are integrated in a
3-D cylindrical capacitor. FE properties are demonstrated, confirming that vertically etched Si/oxide sidewalls and cylindrical structures do not inhibit the crystallization into the FE phase. Finally 3-D NAND-type macaroni ferroelectric field effect transistor (FeFET) devices are fabricated with a memory window
up to 2 V, fast write/erase pulse down to 100 ns, flash-like endurance and extrapolated retention to 10 years at 85ºC. To complete the study, disturb and
charge-trapping effects are analyzed. This technology offers low-power highdensity high-speed non-volatile memory that decreases the speed gap between
the central processing unit (CPU) and storage.

Date:1 Dec 2015 →  7 Jun 2019
Keywords:ferroelectricity, Vertical FeFET
Project type:PhD project