A 28 nm CMOS Triple-Latch Feed-Forward Dynamic Comparator With < 27 ps / 1 V and < 70 ps / 0.6 V Delay at 5 mV-Sensitivity
A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog-Digital Corrections in 28-nm CMOS
A 5GS/s 158.6mW 12b Passive-Sampling 8×-Interleaved Hybrid ADC with 9.4 ENOB and 160.5dB FoMS in 28nm CMOS